Minimization of Boolean Functions

This thesis presents two new methods of test-per-clock BIST design for combinational circuits. One of them is based on a transformation of the PRPG code words into test patterns generated by an ATPG tool. This transformation is done by a combinational circuit. For a design of such a circuit two major tasks have to be solved: first, the proper matching between the PRPG code words and the test patterns has to be found, and then the resulting Boolean function that is described by a truth table needs to be minimized. Such a Boolean minimization is a rather difficult task, as the number of input and output variables is often very large. Standard minimization tools, like ESPRESSO, often cannot efficiently minimize functions with a large number of input variables in a reasonable time. Therefore a novel Boolean minimizer BOOM that is capable to handle such function was developed. The BOOM system is based on a new implicant generation paradigm. In contrast to all previous minimization methods, where the implicants are generated bottom-up, the proposed method uses a top-down approach. Thus, instead of increasing the dimensionality of implicants by omitting literals from their terms, the dimension of a universal hypercube is gradually decreased by adding new literals, until an implicant is found. The function to be minimized is defined by its on-set and off-set listed in a truth table; the don't care set, which normally represents the dominant part of the truth table, need not be specified explicitly. The second BIST method, called the coverage-directed assignment, combines the pattern assignment and Boolean minimization together. The implicants of the combinational function performing the pattern transformation are generated directly from the PRPG code words, while the process is directed by the coverage of the ones in the test patterns. The complexity of the resulting BIST is evaluated for several ISCAS benchmarks.